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DATA SHEET DATA SHEET
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PD6121, 6122
REMOTE CONTROL TRANSMISSION CMOS IC
MOS INTEGRATED CIRCUIT
The PD6121, 6122 are infrared remote control transmission ICs using the NEC transmission format that are ideally suited for TVs, VCRs, audio equipment, air conditioners, etc. By combining external diodes and resistors, a maximum of 65,536 custom codes can be specified. These ICs come in small packages, thus facilitating the design of light and compact remote control transmitters. The NEC transmission format consists of leader codes, custom codes (16 bits), and data codes (16 bits). It can be used for various systems through decoding by a microcontroller.
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FEATURES
* * * *
Low-voltage operation: VDD = 2.0 to 3.3 V Low current dissipation: 1 A Max. (at standby) Custom codes: 65,536 (set by external diodes and resistors) Data codes: * PD6121: 32 codes (single input), 3 codes (double input), expandable up to 64 codes through SEL pin * PD6122: 64 codes (single input), 3 codes (double input), expandable up to 128 codes through SEL pin
*
* PD6121, 6122 are transmission code-compatible (NEC transmission format) with the PD1913CNote, 1943GNote,
6102GNote, and 6120CNote.
* Pin compatibility:
* PD6121G-001 is pin-compatible with the PD1943G (However, capacitance of capacitor connected to oscillator pin and other parameters vary) * PD6122G-001 is pin-compatible with the PD6102G (However, capacitance of capacitor connected to oscillator pin and other parameters vary)
* Standard products (Ver. I, Ver. II specifications)
Note Provided for maintenance purpose only * When using this product (in NEC transmission format), please order custom codes from NEC. * New custom codes for the PD6121G-002, PD6122G-002 cannot be ordered.
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The information in this document is subject to change without notice. Document No. U10114EJ6V0DS00 (6th edition) (Previous No. IC-1813) Date Published October 1995 P) Printed in Japan The mark
*
shows revised points.
(c)
1994 1994
PD6121, 6122
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INFORMATION
Package 20-pin plastic SOP (375 mil) 20-pin plastic SOP (375 mil) 24-pin plastic SOP (375 mil) 24-pin plastic SOP (375 mil) Description Standard (Ver I spec.) Standard (Ver II spec.) Standard (Ver I spec.) Standard (Ver II spec.)
Part number PD6121G-001 PD6121G-002 PD6122G-001 PD6122G-002
PIN CONFIGURATION (Top View)
PD6121 KI0 KI1 KI2 KI3 REM VDD SEL OSCO OSCI VSS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 CCS KI/O0 KI/O1 KI/O2 KI/O3 KI/O4 KI/O5 KI/O6 KI/O7 LMP KI2 KI3 KI4 KI5 KI6 KI7 REM VDD SEL OSCO OSCI VSS 1 2 3 4 5 6 7 8 9 10 11 12 PD6122 24 23 22 21 20 19 18 17 16 15 14 13 KI1 KI0 CCS KI/O0 KI/O1 KI/O2 KI/O3 KI/O4 KI/O5 KI/O6 KI/O7 LMP
PD6121G-001 PD6121G-002
PD6122G-001 PD6122G-002
PIN IDENTIFICATIONS
CCS KI0 - KI7 LMP : : : Custom code selection input Key input Key input/output Lamp output Resonator connection pin REM : SEL : VDD : VSS : Remote output SEL input Power supply pin GND pin
KI/O0 - KI/O7 : OSCI, OSCO:
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DIAGRAM
OSCO OSCI VDD LMP
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Oscillator Output circuit REM
Frequency divider SEL
Controller
Data register Timing generator VSS CCS Key input circuit Key input/output circuit
KI0 - KInNote
KI/O0
KI/O1
KI/O2
KI/O3
KI/O4
KI/O5
KI/O6
KI/O7
Note
PD6121: KI0 - KI3 PD6122: KI0 - KI7
DIFFERENCES BETWEEN PRODUCTS
Part number Item Operating voltage Current consumption (at standby) Custom codes Data codes No. of KI pins No. of KI/O pins SEL pin Transmission format Package 32 x 2 4 8 Provided NEC transmission format 20-pin plastic SOP (375 mil) 24-pin plastic SOP (375 mil) 65,536 (16-bit setting) 64 x 2 8 PD6121 VDD = 2.0 to 3.3 V 1 A MAX. PD6122
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PD6121, 6122
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(1) Key input pins (KI0 to KI7), key input/output pins (KI/O0 to KI/O7) A pull-down resistor is placed between key input pins and a VSS pin. When several keys are pressed simultaneously, the transmission of the corresponding signals is inhibited by a multiple-input prevention circuit. In the case of double-key input, transmission is inhibited if both keys are pressed simultaneously (within 36 ms interval); if not pressed simultaneously, the priority of transmission is first key, then second key. When a key is pressed, the custom code and data code reading is initiated, and 36 ms later, output to REM output is initiated. Thus if the key is pressed during the initial 36 ms, one transmission is performed. If a key is kept pressed for 108 ms or longer, only leader codes are consecutively transmitted until the key is released. Keys can be operated intermittently at intervals as short as 126 ms (interval between two on's), making this an extremely fast-response system. (2) Resonator connection pins (OSCI, OSCO) The oscillator starts operating when it receives a key input. Use a ceramic resonator with a frequency between 400 and 500 kHz. (3) Power-supply pin The power supply voltage is supplied by two 3-V batteries. A broad range of operating power supply voltage is allowed, from 2.0 to 3.3 V. The supply current falls below 1 A when the oscillator is inactive when no keys are pressed. (4) REM output pin The REM output pin outputs the transmission code, which consists of the leader code, custom code (16 bits), and data code (16 bits) (Refer to 2. NEC TRANSMISSION FORMAT (REM OUTPUT)). (5) SEL input pin By controlling D7 of the data code with this pin, the PD6121 and PD6122 can transmit 64 and 128 different data codes, respectively. By connecting the SEL pin to VDD or VSS, D7 is set to "0" or "1", respectively. This pin has high-impedance input, therefore be sure to connect it either to VDD or VSS. (6) CCS input pin By placing a diode between the CCS pin and the KI/O pin, it is possible to set a custom code. When a diode is connected, the corresponding custom code is "1", and when not connected, it is "0". (7) LMP output pin The LMP pin outputs a low-level signal while the REM pin outputs a transmission code.
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2.
NEC TRANSMISSION FORMAT (REM OUTPUT)
The NEC transmission format consists of the transmission of a leader code, 16-bit custom codes (Custom Code, Custom Code'), and 16-bit data codes (Data Code, Data Code) at one time, as shown in Figure 2-1. Also refer to 4. REMOTE OUTPUT WAVEFORM. Data Code is the inverted code of Data Code. The leader code consists of a 9-ms carrier waveform and a 4.5-ms OFF waveform and is used as leader for the ensuing code to facilitate reception detection. Codes use the PPM (Pulse Position Modulation) method, and the signals "1" and "0" are fixed by the interval between pulses. Figure 2-1. REM Output Code
C0 C1 C2 C3 C4 C5 C6 C7 or or or or or or or or C0 C1 C2 C3 C4 C5 C6 C7
Leader Code
Custom Code
= = = = = = = =
Custom Code'
C0 C1 C2 C3 C4 C5 C6 C7 C0' C1' C2' C3' C4' C5' C6' C7' D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7
Data Code
Data Code
Cautions 1. Use any of the possible 256 kinds of custom codes specified with 00xxH (diode not connected), as desired. If intending to use custom codes other than 00xxH, please consult NEC in order to avoid various types of errors from occurring between systems. 2. When receiving data in the NEC transmission format, check that the 32 bits made up of the 16-bit custom code (Custom Code, Custom Code') and the 16-bit data code (Data Code, Data Code) are fully decoded, and that there are no signals with the 33rd bit and after (be sure to check also Data Code).
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CODE (CUSTOM CODE, CUSTOM CODE') SETTING
The custom code is set in two different ways depending on whether Ver I or Ver II specifications are employed. Figure 3-1. Custom Code Setting
Higher 8 bits of custom code Ver I Ver II Fixed by external diode bit C0, C1, C2 ... Fixed by connecting CCS pin and either one of pins KI/O0 to KI/O7 C3 to C7 ... Fixed by absence or presence of external pull-up resistor for KI/O6, KI/O7 Lower 8 bits of custom code' Fixed by external pull-up resistor bit Fixed by external pull-up resistor (KI/O0 to KI/O5) bit
Remark The PD6121-001 has Ver I specifications and is pin-compatible with the PD1943G, and the PD6122001 has Ver I specifications and is pin-compatible with the PD6102G. If used as pin-compatible products, please note the following points. 1 Connect the SEL pin to VDD. 2 Change the capacitance of the capacitor connected to the resonator connection pin (Refer to 9. ELECTRICAL SPECIFICATIONS). A custom code setting example is shown below.
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3.1
Standard versions with Ver I specs. (PD6121-001, PD6122-001)
Each of the higher 8 bits of the custom code is set to "1" when a diode is connected between the CCS pin and the corresponding KI/O pin, and is set to "0" when no diode is connected. If a pull-up resistor is connected to the KI/O pin corresponding to one of the lower 8 bits of the custom code', the bit is first set to "1". Based on the 1's information of the lower 8 bits of the custom code', the corresponding bit of the higher 8 bits of the custom code is then captured and not inverted. The non-inverted value is finally overwritten to the corresponding bit of the lower 8 bits of the custom code'. The inverse occurs when no pull-up resistor is connected. It follows from the above that the custom code can be set in 65,536 different ways depending on whether or not a diode and/or pull-up resistor are present. Please refer to Figure 3-2 Example of Custom Code Setting for Ver I Specifications (PD6121-001, 6122001). Figure 3-2. Example of Custom Code Setting for Ver I Specifications (PD6121-001, 6122-001) Configuration example
CCS KI/O0 VDD KI/O1 KI/O2 KI/O3 VDD KI/O4 KI/O5 KI/O6 KI/O7
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Set custom code
Higher 8 bits of custom code 1 0 0 0 1 0 1 0
C0 C1 C2 C3 C4 C5 C6 C7
Set to "1" by diode
The inversion/non-inversion of the lower 8 bits of the custom code' is determined by the pull-up resistor connected to the KI/O pin. Set custom code
Lower 8 bits of custom code' 1 0 0 0 1 0 0 0
C0' C1' C2' C3' C4' C5' C6' C7'
Set to "1" by pull-up resistor, that is, bit for non-inversion of custom code is set 1: Non-inversion for C0 to C7 0: Inversion for C0 to C7
When the above-described setting is done, the following custom code is output. Custom code
Higher 8 bits of custom code 1 0 0 0 1 0 1 0 Lower 8 bits of custom code' 1 1 1 1 1 1 0 1
C0 C1 C2 C3 C4 C5 C6 C7
C0' C1' C2' C3' C4' C5' C6' C7' C0 C1 C2 C3 C4 C5 C6 C7
Remark Codes are transmitted from the LSB.
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*
versions with Ver II specs. (PD6121-002, 6122-002)
In Ver II, the CCS pin does not have the external diode reading function. The allocation of C2, C1 and C0 of the higher 8 bits of the custom code is done by connecting the CCS pin to any one of the KI/O0 to KI/O7 pins, as shown below.
Pin connected to CCS pin KI/O0 KI/O1 KI/O2 KI/O3 KI/O4 KI/O5 KI/O6 KI/O7 C2 C1 C0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1
When CCS pin is open, (C2 C1 C0) = (0 0 0)
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The allocation of C7, C6, C5, C4 and C3 of the higher 8 bits of the custom code is as follows depending on whether a pull-up resistor is provided.
Pull-up Resistor KI/O6 Not Provided Not Provided Provided Provided KI/O7 Not Provided Provided Not Provided Provided C7 to C3 of Higher 8 bits of Custom Code C7 0 1 1 1 C6 0 0 0 1 C5 0 0 0 1 C4 0 1 0 0 C3 0 1 0 1
Caution
In Ver II, it is not possible to set all custom codes. Also, new custom codes cannot be ordered for Ver II products; therefore, Ver I products should be used if new custom codes are required.
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Configuration Example
CCS KI/O0 VDD KI/O1 VDD KI/O2 KI/O3 KI/O4 KI/O5 KI/O6 KI/O7 VDD VDD
ROM3 selector Connection of any one line : Connected : Not connected
C2, C1 and C0 of the higher 8 bits of the custom code are fixed by connecting the CCS pin to KI/O0 to KI/ O7. Therefore, in the configuration example, they become 1 0 0 . C0 C1 C2 C7, C6, C5, C4 and C3 of the higher 8 bits of the custom code are selected and fixed by the pull-up resistor connected to KI/O6 and KI/O7 in four channels.
Pull-up resistor C7 1 0 1 1 C6 0 0 1 1 C5 1 1 0 1 C4 1 1 1 1 C3 0 1 1 1 KI/O6 KI/O7
Disconnected Disconnected Disconnected Connected Connected Connected Disconnected Connected
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In this configuration example, C3 to C7 of the higher 8 bits of the custom code become 1 1 0 1 1 . C3 C4 C5 C6 C7 The inversion/non-inversion of the lower 8 bits of the custom code' is fixed by the bit of the external pullup resistor of KI/O0 to KI/O5.
External setting (Refer to Configuration Example) Lower 8 bits of custom code' 1 0 1 0 0 0 0 0
*
C0' C1' C2' C3' C4' C5' C6' C7' Pull-up resistor bit (KI/O0, KI/O2) Bit for non-inversion of custom code is set 1: Non-inversion for C0 to C7 0: Inversion for C0 to C7
Caution
C6' and C7' are fixed to 0.
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PD6121, 6122
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Custom code
Higher 8 bits of custom code 1 0 0 1 1 0 1 1 Lower 8 bits of custom code' 1 1 0 0 0 1 0 0
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C0 C1 C2 C3 C4 C5 C6 C7
C0' C1' C2' C3' C4' C5' C6' C7' C0 C1 C2 C3 C4 C5 C6 C7
Remark Codes are transmitted from the LSB.
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OUTPUT WAVEFORM (NEC TRANSMISSION FORMAT: ONE-SHOT COMMAND TRANSMISSION MODE)
* When fOSC = 455 kHz (1) Remote (REM) output (from stage 2 , transmission occurs only when key is kept depressed)
REM output 58.5 to 76.5 ms 108 ms
1
108 ms
2
(2) Magnification of stage 1
3
REM output 9 ms 4.5 ms Custom Code 8 bits Custom Code' 8 bits Data Code 8 bits 27 ms Data Code 8 bits Stop Bit 1 bit
13.5 ms Leader Code
18 ms to 36 ms 58.5 ms to 76.5 ms
(3) Magnification of waveform 3
REM output 9 ms 13.5 ms 4.5 ms 0.56 ms 1.125 ms 2.25 ms 0 1 1 0 0
(4) Magnification of waveform 2
REM output 9 ms 11.25 ms Leader Code 2.25 ms 0.56 ms Stop Bit
(5) Carrier waveform (Magnification of HIGH period of codes)
REM output 8.77 s 26.3 s 9 ms or 0.56 ms Carrier frequency: fc = fosc/12 = 38 kHz
Remark If a key is kept depressed, the second and subsequent times, only the leader code and the stop bit are transmitted, which allows power savings for the infrared-emitting diode. If a command is issued continuously in the same way the second and subsequent times as the first time, refer to 7. ONE-SHOT/CONTINUOUS COMMAND TRANSMISSION MODE.
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CODES (SINGLE INPUT)
DATA CODE D3 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 DATA CODE D3 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 NOTES
KEY K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K20 K21 K22 K23 K24 K25 K26 K27 K28 K29 K30 K31 K32 KEY K33 K34 K35 K36 K37 K38 K39 K40 K41 K42 K43 K44 K45 K46 K47 K48 K49 K50 K51 K52 K53 K54 K55 K56 K57 K58 K59 K60 K61 K62 K63 K64
KI0 *
CONNECTION KI1 KI2 KI3 * * *
KI/O KI/O0
* * * * * * * * * * * * * * * * * * * * * * * * * * KI4 * * CONNECTION KI5 KI6 KI7 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
KI/O1
KI/O2
KI/O3
KI/O4
KI/O5
KI/O6
KI/O7
KI/O KI/O0
KI/O1
KI/O2
KI/O3
KI/O4
KI/O5
KI/O6
KI/O7
Note
Bit D7 is "0" when the SEL pin is connected to VDD, and "1" when it is connected to VSS.
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D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D7 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
NOTES PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G PD1943G PD1913C PD6120C PD6121G Unavailable

PD1913C PD6120C

PD1913C PD6120C

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D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D7Note 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1 0/1
PD1913C PD6120C
Unavailable
Unavailable
* PD6121 * PD6122
Unavailable
Unavailable
Unavailable
Unavailable
* PD6122 only
Unavailable
Unavailable
Unavailable
Unavailable
PD6121, 6122
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OPERATION
All keys are provided with a multiple-input prevention circuit. When two or more keys are pressed simultaneously, no signal is transmitted; but when the keys K21 and K22, K21 and K23, or K21 and K24 are pressed together, D5 is set to "1". However, the way keys are pressed determines the priority: If K22/K23/K24 are pressed 126 ms or longer after K21 is pressed, transmission is performed in this mode. Double-input key operation is ideally suited for tape recording error prevention applications. Double-Input Operation Key Codes
KEY K21 + K22 K21 + K23 K21 + K24 D0 1 0 1 D1 0 1 1 D2 1 1 1 D3 0 0 0 D4 1 1 1 D5 1 1 1 D6 0 0 0 D7 0/1 0/1 0/1
Double-Input Operation Timing 1 Double-input transmission
K21 code transmission t > 126 ms K22/K23/K24 push D5 + K22/K23/K24 code transmission
K21 push
2 No operation
K21 code transmission 36 ms < t < 126 ms K22/K23/K24 push Transmission stop
K21 push
3 No operation
No transmission -36 ms < t < 36 ms push K22/K23/K24 push
K21
4 No operation
K21 t > 126 ms K22/K23/K24 push K22/K23/K24 code transmission push Transmission stop
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COMMAND TRANSMISSION MODE
7.1
One-shot Command Transmission Mode
In order to reduce the average transmission current, the PD6120C, 6121G, and 6122G transmit data only once, and thereafter transmit just the leader code and stop bit indicating that a key is depressed. As a result, this transmission method (one-shot command transmission mode) has the following characteristics. Advantages * Average transmission current is reduced to 1/3 to 1/4 compared with continuous command transmission mode * Reduced software load for reception program (not all commands are processed all the time) * This mode distinguishes when a key is pressed several times successively and when a key is kept depressed. Disadvantages * If a command is not read the first time, it cannot be read a second time * If a signal transmission is interrupted while continuous commands are executed, subsequent commands cannot be executed. Moreover, when fOSC = 455 kHz, the average current to the infrared-emitting diode is roughly equivalent to 3 % of the peak current. IAVE = (9 ms + 0.56 ms)/108 ms x 1/3 (duty) = 2.95 % (first command is ignored)
7.2
Continuous Command Transmission Mode
A continuous command transmission mode for transmitting data a second or more times is also available. As shown in Figure 7-2, it is possible to continuously transmit commands for all the keys or for individual key output lines simply by adding a diode D and connecting it to KI0 or KI/O. In this case, the average transmission current is larger than that in the one-shot command transmission mode. When fOSC = 455 kHz, the average current to the infrared-emitting diode is roughly equivalent to 9 % of the peak current. IAVE = (9 ms + 0.56 ms x 33)/108 ms x 1/3 (duty) = 8.48 % Cautions 1. If the double input key (K21-K24) is used in the continuous command transmission mode, double-input key transmission is not performed (D5 does not become 1). 2. When the voltage drop of the REM output is large, the signal is not transmitted accurately. Therefore, keep the REM output current within 1 mA. Figure 7-1 shows the continuous command transmission mode.
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Figure 7-1. Continuous Command Transmission Mode (When fOSC = 455 kHz)
(1) PD6120C, 6121G, 6122G
REM output 58.5 to 76.5 ms 108 ms 31.5 to 49.5 ms Average transmission current ratio ITYP = 8.48 % x Ipeak (LED)
LMP output
(2) PD1913C, 1943G, 6102G 1 K1 to K20, K33 to K52 (KO0 to KO4)
REM output
67.5 ms 105.5 msNote 38 ms
Average transmission current ratio ITYP = 8.68 % x Ipeak (LED)
LMP output
2 K21 to K32, K53 to K64 (KO5 to KO7)
REM output 67.5 ms 87.5 msNote 20 ms
Average transmission current ratio ITYP = 10.47 % x Ipeak (LED)
LMP output
Note
In the case of the PD1913C, 1943G and 6102G, the transmission repeat cycle (T) varies depending on the key.
Remark ITYP = IAVE x Ipeak (LED) IAVE = (9 ms + 0.56 ms x 33)/T ms x 1/3 (duty)
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1
Continuous command transmission for all keysNote 1 REM output is input to KI0 with diode D.
Ceramic resonator 455 kHz 220 pF OSCO OSCI 220 pF VDD 100 Transmission 47 F display + 82 LMP REM 2.2 k PD6121G-001 PD6121G-002
VSS 12 k Custom code selection resistor Diode D
CCS KI2 KI0 KI3 KI1 KI/O0 KI/O1 KI/O2 KI/O3 KI/O4 KI/O5 KI/O6 KI/O7 VDD VDD
Key matrix
Custom code selection diode
2
Continuous command transmission for key output lines REM output is input to KI/O with diode D.
Ceramic resonator 455 kHz 220 pF OSCO OSCI 220 pF VDD 100 Transmission 47 F display + 82 LMP REM 2.2 k PD6121G-001 PD6121G-002
VSS 12 k Custom code selection resistor
CCS KI2 KI0 KI3 KI1 KI/O0 KI/O1 KI/O2 KI/O3 KI/O4 KI/O5 KI/O6 KI/O7 VDD VDD
Custom code selection diode
Diode D
Continuous command transmission can be performed for keys whose KI/O output lines have received diode D input Note 2.
*
Notes 1. 2. Caution
Double-key transmission cannot be performed. If the KI/O5 output line (double-input key) is in the continuous command transmission mode, double-input key transmission is not performed (D5 does not become 1). When the voltage drop of the REM output is large, the signal is not transmitted accurately. Therefore, keep the REM output current within 1 mA.
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CIRCUIT EXAMPLE
(1) Example application circuit using PD6121
Ceramic resonator 455 kHz + 3V Infrared-emitting diode SE303A-C SE307-C SE313 SE1003-C 2SC2001, 3616 2SD1513, 1616 2SD1614 VSS CCS KI0 KI3 KI/O0 VDD VDD KI/O7 Custom code selection resistor Key matrix 8 x 4 = 32 keys =
OSCO
OSCI
VDD
LMP
REM
SEL
PD6121G-001
Custom code selection diode
(2) Example application circuit using PD6122
Ceramic resonator 455 kHz + 3V Infrared-emitting diode SE303A-C SE307-C SE313 SE1003-C 2SC2001, 3616 2SD1513, 1616 2SD1614 VSS CCS KI0 KI7 KI/O0 VDD VDD KI/O7 Custom code selection resistor Key matrix 8 x 8 = 64 keys
OSCO
OSCI
VDD
LMP
REM
SEL
PD6122G-001
Custom code selection diode
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*
Microcomputer
Preamplifier (amplification, waveform shaping)
Key input
Display IN PIN photo diode PH302C PH310 PH320 OUT INT Control PC2800A, 2801ANote PC2803 PC2804 17K series 75X series 75XL series 78K series Communications
Shield case
Note
The PC2801A's active level is high.
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PD6121, 6122
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SPECIFICATIONS
Absolute Maximum Ratings (TA = 25 C)
Parameter Supply voltage Input voltage Power dissipation Operating ambient temperature Storage temperature Symbol VDD VI PD TA Tstg Ratings -0.3 to +6.0 -0.3 to VDD + 0.3 250 -20 to +75 -40 to +125 Unit V V mW C C
Recommended Operating Conditions (TA = -20 to +75 C)
Parameter Supply voltage Oscillation frequency Input voltage Custom code select pull-up resistor Symbol VDD fOSC VI RUP MIN. 2.0 400 0 160 200 TYP. 3.0 455 MAX. 3.3 500 VDD 240 Unit V kHz V k
DC Characteristics (TA = 25 C, VDD = 3.0 V)
Parameter Supply current 1 Supply current 2 REM output current High REM output current Low LMP output current High LMP output current Low KI input current High KI input current Low KI, SEL input voltage High KI, SEL input voltage Low KI/O input voltage High KI/O input voltage Low KI/O input current High KI/O input current Low KI/O output current High KI/O output current Low CCS input voltage High CCS input current High CCS input current Low CCS input current High CCS input current Low Symbol IDD1 IDD2 IOH1 IOL1 IOH2 IOL2 IIH1 IIL1 VIH1 VIL1 VIH2 VIL2 IIH2 IIL2 IOH3 IOL3 VIH3 IIH3 IIL3 IIH4 IIL4 Pull-up, VI = 3.0 V Pull-up, VI = 0 V Pull-down, VI = 3.0 V Pull-down, VI = 0 V -3 10 VI = 3.0 V VI = 0 V VO = 2.5 V VO = 1.7 V -1.0 35 1.1 0.2 -8 30 -0.2 2 Condition fOSC = 455 kHz fOSC = STOP VO = 1.5 V VO = 0.3 V VO = 2.7 V VO = 0.3 V VI = 3.0 V VI = 0 V 2.1 0 1.3 0.4 7 -0.2 -2.5 100 -5 15 -15 1 10 -8 30 -30 1.5 30 -0.2 3.0 0.9 MIN. TYP. 0.1 MAX. 1 1 Unit mA A mA A A mA A A V V V V A A mA A V A A A A
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PD6121, 6122
www..com Recommended Ceramic Resonators (TA = -20 to +75 C, VDD = 2.0 to 3.3 V)
* PD6121, 6122
Maker Murata Seisakusho Corp. Product CSB455E CSB480E Toko Corp. Kyocera Corp. CRK455 KBR-455BTLR Recommended constant [pF] C1 220 220 120 220 C2 220 220 300 220 Operating voltage [V] MIN. 2.0 2.0 2.0 2.0 MAX. 3.3 3.3 3.3 3.3
Example of external circuit
OSCI
OSCO
C1 VDD
C2
Caution
If using an oscillation circuit, wire the area enclosed in the dotted line in the figure in the manner indicated below in order to avoid negative effects such as from stray capacitance of wires. * Keep wiring as short as possible. * Do not cross other signal lines. Do not design wiring close to lines with large fluctuating current. * Make sure that the connection point of the oscillation circuit's capacitor has the same potential as VDD. * Do not extract signals from the oscillation circuit.
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PD6121, 6122
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DRAWINGS
*
(1) Package for the PD6121
20 PIN PLASTIC SOP (375 mil)
20 11
detail of lead end
1 A
10 H
G
P I
J
F
K
B C D
NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition.
L N
E
M
M
ITEM A B C D E F G H I J K L M N P
MILLIMETERS 13.00 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 -0.05 0.1250.075 2.9 MAX. 2.50 10.30.3 7.2 1.6 0.15 +0.10 -0.05 0.80.2 0.12 0.15 3 +7 -3
INCHES 0.512 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 -0.003 0.0050.003 0.115 MAX. 0.098 0.406 +0.012 -0.013 0.283 0.063 0.006 +0.004 -0.002 0.031 +0.009 -0.008 0.005 0.006 3 +7 -3 P20GM-50-375B-4
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PD6121, 6122
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*
PD6122
24 PIN PLASTIC SOP (375 mil)
24 13
detail of lead end
1 A
12 H
P
F
G
I
J
K
E
C D
NOTE
B M
M
L N
ITEM A B C D E F G H I J K L M N P
MILLIMETERS 15.54 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 -0.05 0.10.1 2.9 MAX. 2.50 10.30.3 7.2 1.6 0.15 +0.10 -0.05 0.80.2 0.12 0.15 3 +7 -3
INCHES 0.612 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 -0.003 0.0040.004 0.115 MAX. 0.098 0.406 +0.012 -0.013 0.283 0.063 0.006 +0.004 -0.002 0.031 +0.009 -0.008 0.005 0.006 3 +7 -3 P24GM-50-375B-3
Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition.
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PD6121, 6122
www..com 11. RECOMMENDED
SOLDERING CONDITIONS
The following conditions (see table below) must be met when soldering this product. For more details, refer to the NEC document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (IEI-1207). Please consult an NEC sales representative in case an other soldering process is used, or in case soldering is done under different conditions. Table 11-1. Soldering Conditions for Surface Mounting PD6121G-001: 20-pin plastic SOP (375 mil) PD6121G-002: 20-pin plastic SOP (375 mil) PD6122G-001: 24-pin plastic SOP (375 mil) PD6122G-002: 24-pin plastic SOP (375 mil)
Soldering Process Infrared ray reflow Soldering Conditions Peak temperature of package surface: 230 C, Reflow time: 30 seconds or less (210 C or higher), Number of reflow processes: 1 Peak temperature of package surface: 215 C, Reflow time: 40 seconds or less (200 C or higher), Number of reflow processes: 1 Solder temperature: 260 C or lower, Reflow time: 10 seconds or less, Number of reflow processes: 1 Preheat temperature: 120 C or lower (at package surface) Partial heating Pin temperature: 300 C or lower, Time: 3 seconds or less (per device side) -- Symbol IR30-00-1
*
VPS
VP15-00-1
Wave soldering
WS60-00-1
Caution
Do not apply more than one soldering method at any one time, except for the partial heating method.
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PD6121, 6122
www..com APPENDIX.
*
REMOTE CONTROL TRANSMISSION IC AND MICROCONTROLLER LIST
* Single-function remote control transmission ICs (NEC transmission format)
Part number Parameter Operating voltage Operating clock Transmission format Modulation method Leader PD6121 VDD = 2.0 to 3.3 V fOSC = 400 to 500 kHz ceramic resonator 16-bit custom code PPM 0 ***** 8-bit data code 1 ***** 8-bit data code PD6122
38-kHz carrier modulation (fosc = 455 kHz) Custom code Data code No. of keys Package 32 x 2 32 20-pin SOP (375 mil) 16-bit setting 64 x 2 64 24-pin SOP (375 mil)
Cautions 1. New custom codes are not available for the following standard products.
PD6121G, 6122G Ver II standard products (-002)
2. If products other than listed in Caution 1 are used, please contact NEC for custom codes.
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PD6121, 6122
www..com * Single-Function 4-bit Single-Chip Microcontroller Part number Parameter ROM capacity RAM capacity Oscillator S0 (S-IN) 512 x 10 bits 32 x 4 bits Ceramic oscillator RC oscillator 1002 x 10 bits PD6133 PD6134 PD6604Note 1
*
Read with P01 register (left shift instruction excluded, standby cancellation function provided) I/O (standby cancellation function provided) 8 x 6 = 48 keys fX/8, fX/16 Also usable for RAM RF (1 level) fX, fX/8, fX/12, high level fX/2, fX/16, fX/24 (software specified) 8 s (fX = 1 MHz) fX = 300 kHz to 1 MHz VDD = 1.8 to 3.6 V TA = -40 to +85 C Not provided (NOP instruction provided) Low level is output to RESET pin at detection * 20-pin plastic SOP * 20-pin plastic SOP * 20-pin plastic shrink DIP * 20-pin plastic SOP * 20-pin plastic shrink SOP
S1/LED (S-OUT) Key matrix (without Di) Timer clock Stack Carrier frequency
Instruction execution time Operating frequency Power supply voltage Operating ambient temperature Charge/discharge function (NOP) Low voltage detector Package
PROM version
PD61F35 (flash EEPROM TM)Note 2
Notes 1. Under development 2. This product's pin configuration is the same as that of the 20-pin PD6133, 6134, and 6604, but the package is a 24-pin SOP shrink DIP package. Caution If using the NEC transmission format, please contact NEC for the custom code.
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PD6121, 6122
www..com * 4-Bit Single-Chip Microcontroller for Programmable Remote Control Transmission
*
Part number Parameter ROM capacity RAM capacity Oscillator S0 (S-IN) S1/LED (S-OUT) Key matrix (without Di) Timer clock Stack Carrier frequency Instruction execution time Operating frequency Power supply voltage Operating ambient temperature Charge/discharge function (NOP) Low voltage detector
PD6600
PD6600A
PD6124
PD6124A
PD6125A
512 x 10 bits 32 x 5 bits Ceramic oscillator Read with left shift instruction Output 8 x 4 = 32 keys fX/8 Also usable for RAM (3 levels) fX/8, fX/12 (mask option) 16 s (fX = 500 kHz) fX = 400 kHz to 500 kHz VDD = 2.0 to 3.6 V VDD = 2.2 to 3.6 V
1002 x 10 bits
8 x 8 = 64 keys
VDD = 2.0 to 6.0 V
VDD = 2.2 to 5.5 V
VDD = 2.0 to 6.0 V
TA = -20 to +75 C Provided Not provided Low level is output to S-OUT pin at detection Not provided Low level is ouput to S-OUT pin at detection Not provided
Package
* 20-pin plastic SOP * 20-pin plastic shrink DIP
* 24-pin plastic SOP * 24-pin plastic shrink DIP --
PROM version
PD61P24 (one-time PROM)
Caution If using the NEC transmission format, please contact NEC for the custom code.
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PD6121, 6122
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NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
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PD6121, 6122
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The application circuits and their parameters are for references only and are not intended for use in actual design-in's. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product.
M4 94.11
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